Q: What is the input 'sel'?
A:Sel could be anything that let you choose the value to output correctly. You can think of it as the current disparity, which is an input to
the datapath and output from the FSM.
Q: How many flip-flops do we need?
Answer as a question: How many states are there for this FSM? How many bits do
you need to represent this many states? Note that a n-bit register is
equivalent to n D-flip-flops.
Q: On Lookup tables in Lab 2.
A: Our assignment specification suggests that you use a lookup table for
lab 2.
There are two basic ways to do this. One is (IMHO) far easier than the
other.
The first method is a multiplexer with constant inputs. This way's kind
of cumbersome because you probably have to type in all the constant
values by hand and things can get kind of cramped. And you can't do it
with a script unless you do some messing with your .circ file's XML
The method I prefer is located in the folder called Memory: the ROM.
With a rom, you have an input, the address, and it outputs the contents
of the memory at the specified address. The ROM is handy because it can take a text file as input and
automatically set the contents of the memory. To see this in action, place a ROM in your circuit, make its address bit
width 4 and its data bit width 8. Then right click (control click for Macs) on it, and choose Load Image,
and give it this file:
http://www.csuglab.cornell.edu/~pht24/cs3410/example-rom-image.txt
You'll see that some numbers appear in the ROM. What's more, these
numbers correspond to the numbers in the file I gave. In general, the file begins with "v2.0 raw", then has any white space
between consecutive values. Values appear in consecutive order.
Q: Do I need to flip the order of bits in output?
A: This is better explained using an example. Let's say you have 000 00000 as an input, that is, HGF EDCBA. H is data_in[7], A is data_in[0].
The output can be either 100111 0100 or 011000 1011, abcedi_fghj. NOTE: We should agree that the 'j' bit will be the data_out[0], 'a' bit is data_out[9].
Q: Is it possible to do test vector using clock? A: Test vectors do not work for sequential circuits, only combinational circuits. You are of course still able to test the datapath for your circuit, since it should be fully combinational. This is, of course, why we suggested the design on the assignment specification. After you have fully verified your datapath using a test vector, a few manual tests are all you need to ensure that the FSM properly changes state when it should.